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iEDCL: Streamlined, False-Error-Free Error Detection and Correction Scheme in a Near-Threshold Enabled 32-bit Processor.

Runze YuZhenhao LiXi DengZhaoxu WangWei JiaHaoming ZhangZhenglin Liu
Published in: IEEE Trans. Very Large Scale Integr. Syst. (2024)
Keyphrases
  • error free
  • error detection and correction
  • error prone
  • high speed
  • image compression
  • error correction