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Multi-scale Hyper-time Hardware Emulation of Human Motor Nervous System Based on Spiking Neurons using FPGA.
Chuanxin Minos Niu
Sirish K. Nandyala
Won Joon Sohn
Terence D. Sanger
Published in:
NIPS (2012)
Keyphrases
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spiking neurons
multiscale
field programmable gate array
hardware implementation
hardware architecture
neuron model
real time
feed forward
image processing
control system
visual processing
image segmentation
computational model
feature vectors
biologically plausible
spike trains
spiking neural networks