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Energy-Delay Estimation Technique for High-Performance Microprocessor VLSI Adders.
Vojin G. Oklobdzija
Bart R. Zeydel
Hoang Q. Dao
Sanu Mathew
Ram Krishnamurthy
Published in:
IEEE Symposium on Computer Arithmetic (2003)
Keyphrases
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power dissipation
high speed
chip design
energy consumption
energy minimization
density estimation
signal processing
cost effective
estimation error
estimation algorithm
floating point
low power
energy efficient
design methodology