An optimized reconfigurable architecture for hardware implementation of decimal arithmetic.
Samaneh EmamiMehdi SedighiPublished in: Comput. Electr. Eng. (2017)
Keyphrases
- hardware implementation
- reconfigurable architecture
- systolic array
- parallel architecture
- floating point
- pipelined architecture
- signal processing
- efficient implementation
- arithmetic operations
- hardware design
- fpga implementation
- hardware architecture
- field programmable gate array
- software implementation
- image processing algorithms
- dedicated hardware
- pipeline architecture
- data flow
- fixed point
- data streams
- computer systems
- markov random field
- data model