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Precise CMOS current sample/hold circuits using differential clock feedthrough attenuation techniques.
Chung-Yu Wu
Chih-Cheng Chen
Jyh-Jer Cho
Published in:
IEEE J. Solid State Circuits (1995)
Keyphrases
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real time
high speed
low power
analog vlsi
power consumption
circuit design
low voltage
delay insensitive
focal plane
data sets
learning algorithm
wave propagation
power reduction