A Bandwidth Reduction Scheme and Its VLSI Implementation for H.264/AVC Motion Vector Decoding.
Jinjia ZhouDajiang ZhouGang HeSatoshi GotoPublished in: PCM (2) (2010)
Keyphrases
- vlsi implementation
- motion vectors
- pixel domain
- macroblock
- video coding
- bit rate
- compressed domain
- motion estimation
- coding efficiency
- bitstream
- coded video
- video coding standard
- prediction scheme
- motion compensation
- search range
- video sequences
- rate distortion
- computational complexity
- video data
- error concealment
- frame interpolation
- reference frame
- transform domain
- block matching
- motion field
- motion estimation algorithm
- inter frame
- filter bank
- intra frame
- subband
- visual quality
- dct domain
- compressed video
- video compression
- video quality
- video codec
- motion compensated
- coding method
- block size
- rate control
- low complexity
- variable block size
- video coder
- video streaming
- associative memory
- real time
- optical flow
- coding scheme
- mode decision
- wyner ziv
- discrete cosine transform
- entropy coding
- scalable video coding
- error propagation
- quadtree