A nonuniform quantizer for hardware implementation of neural networks.
Rosa AltilioAntonello RosatoMassimo PanellaPublished in: ECCTD (2017)
Keyphrases
- hardware implementation
- neural network
- efficient implementation
- vector quantization
- signal processing
- pattern recognition
- dedicated hardware
- software implementation
- hardware design
- coding scheme
- hardware architecture
- fpga implementation
- field programmable gate array
- artificial neural networks
- parallel architecture
- step size
- image processing algorithms
- image binarization
- memory management
- fpga device
- pipeline architecture
- reconfigurable hardware
- quantization scheme
- quantization error
- neural network model