Lowering the Latency of Data Processing Pipelines Through FPGA based Hardware Acceleration.
Muhsen OwaidaGustavo AlonsoLaura FogliariniAnthony Hock-KoonPierre-Etienne MeletPublished in: Proc. VLDB Endow. (2019)
Keyphrases
- data processing
- computer systems
- hardware architecture
- hardware implementation
- low latency
- big data
- field programmable gate array
- hardware design
- data acquisition
- low cost
- hardware architectures
- hardware and software
- stream processing
- embedded systems
- data management
- heterogeneous computing
- real time
- computing systems
- high end
- computing power
- application specific
- data analysis
- high throughput
- response time
- prefetching
- video processing
- operating system
- signal processing
- massively parallel
- efficient implementation
- hardware software
- hardware software partitioning
- data mining