Implementation of efficient, low power deep neural networks on next-generation intel client platforms.
Michael DeisherAndrzej PolonskiPublished in: ICASSP (2017)
Keyphrases
- low power
- neural network
- low cost
- power consumption
- high speed
- cmos technology
- ultra low power
- vlsi architecture
- signal processor
- efficient implementation
- vlsi circuits
- high power
- pattern recognition
- single chip
- highly efficient
- client server
- low power consumption
- power reduction
- mixed signal
- delay insensitive
- wireless transmission
- gate array