A Low Power Charge-Recycling CMOS Clock Buffer.
Xiaohui WangWolfgang PorodPublished in: Great Lakes Symposium on VLSI (1999)
Keyphrases
- low power
- power consumption
- high speed
- clock frequency
- cmos technology
- single chip
- low cost
- high power
- power saving
- digital signal processing
- wireless transmission
- low power consumption
- ultra low power
- vlsi circuits
- vlsi architecture
- image sensor
- delay insensitive
- power dissipation
- logic circuits
- gate array
- power reduction
- nm technology
- real time