Hardware architecture for high throughput event visual data filtering with matrix of IIR filters algorithm.

Marcin Kowalczyk Tomasz Kryjak

Published in: DSD (2022)

Keyphrases

high throughput
hardware architecture
visual data
machine learning
image data
hardware implementation
iir filters
data sets
multiscale
microarray
signal processing
data processing
visual information
image processing algorithms
low pass filter