Improve accuracy of delay element by filtering false path for low power desychronized circuits.

Jun Xu Xiangku Li

Published in: ISCAS (2011)

Keyphrases

low power
power dissipation
high speed
power consumption
logic circuits
vlsi circuits
low cost
cmos technology
power reduction
single chip
mixed signal
delay insensitive
digital signal processing
high power
low power consumption
low complexity
shortest path
vlsi architecture
wireless transmission