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Low-Power HWAccelerator for AI Edge-Computing in Human Activity Recognition Systems.
Antonio De Vita
Danilo Pau
Claudio Parrella
Luigi Di Benedetto
Alfredo Rubino
Gian Domenico Licciardo
Published in:
AICAS (2020)
Keyphrases
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low power
human activity recognition
power consumption
low cost
high speed
activity recognition
artificial intelligence
high power
human activities
single chip
vlsi circuits
digital signal processing
expert systems
logic circuits
vlsi architecture
machine learning
low power consumption
real time