Design of low-power clock generator synchronized with AC power for adiabatic dynamic CMOS logic.
Seung-Il ChoSeong-Kweon KimTomochika HaradaMichio YokoyamaPublished in: IEICE Electron. Express (2013)
Keyphrases
- power consumption
- low power
- logic circuits
- power dissipation
- single chip
- low power consumption
- high speed
- ultra low power
- cmos technology
- power reduction
- vlsi architecture
- nm technology
- high power
- power management
- digital signal processing
- chip design
- gate array
- delay insensitive
- power saving
- low cost
- vlsi circuits
- mixed signal
- energy saving
- wireless transmission
- energy dissipation
- cmos image sensor
- image processing
- data integrity
- image sensor