A Bayesian network approach for compiler auto-tuning for embedded processors.
Amir Hossein AshouriGiovanni MarianiGianluca PalermoCristina SilvanoPublished in: ESTIMedia (2014)
Keyphrases
- embedded processors
- bayesian networks
- single chip
- parallel implementation
- programming language
- hardware and software
- incomplete data
- graphical models
- fine tuned
- structural learning
- real time
- probabilistic inference
- conditional probabilities
- distributed memory machines
- low cost
- probabilistic model
- low power
- motion estimation
- optical flow
- information systems