Optimal structure of interconnection lines for GHz giga-scale nano-CMOS system-on-chip design.

Chung-Yu Wu Jen-Chieh Wang

Published in: ICECS (2004)

Keyphrases

optimal design
power consumption
embedded systems
low cost
high speed
design issues
power supply
single chip
real time
neural network
scale space
design process
production system
hardware and software
design methodology