The eISP low-power and tiny silicon footprint programmable video architecture.
Mathieu TheveninMichel PaindavoineLaurent LetellierRenaud SchmitBarthélémy HeyrmanPublished in: J. Real Time Image Process. (2011)
Keyphrases
- low power
- low cost
- cmos technology
- high speed
- vlsi architecture
- single chip
- signal processor
- real time
- high definition television
- power consumption
- mixed signal
- video sequences
- digital camera
- wireless transmission
- digital signal processing
- high power
- video data
- video streams
- low voltage
- cmos image sensor
- vlsi circuits
- video frames
- hardware and software
- logic circuits
- power dissipation
- nm technology
- video content
- low power consumption
- power reduction
- general purpose
- vlsi implementation
- embedded systems
- coding scheme
- hardware implementation
- gate array
- ultra low power