A novel three-section encoder in a low-power 2.3 GS/s flash ADC.
Masumeh DamghanianSeyed Javad AzhariPublished in: Microelectron. J. (2018)
Keyphrases
- low power
- power reduction
- single chip
- power consumption
- high speed
- low cost
- analog to digital converter
- bit rate
- low complexity
- wireless transmission
- high power
- rate distortion
- wide dynamic range
- video codec
- low power consumption
- digital signal processing
- vlsi circuits
- logic circuits
- vlsi architecture
- motion estimation
- mixed signal
- power dissipation
- image processing
- delay insensitive
- cmos technology
- rate control
- gate array