Pipelined Hardware Implementation of COPA, ELmD, and COLM.
Lilian BossuetCuauhtemoc Mancillas-LópezBrisbane Ovilla-MartinezPublished in: IEEE Trans. Computers (2020)
Keyphrases
- hardware implementation
- parallel architecture
- hypergraph partitioning
- efficient implementation
- signal processing
- hardware design
- data flow
- fpga implementation
- hardware architecture
- software implementation
- image segmentation
- pipeline architecture
- partitioning algorithm
- image processing algorithms
- image binarization
- dedicated hardware
- memory management
- field programmable gate array
- pairwise
- fpga technology
- clustering algorithm
- general purpose processors
- euler number