A compact FPGA-based montgomery multiplier over prime fields.

Miguel Morales-Sandoval Arturo Diaz-Perez

Published in: ACM Great Lakes Symposium on VLSI (2013)

Keyphrases

hardware implementation
fpga implementation
low end
smart card
integer arithmetic
field programmable gate array
computer vision
application specific
hardware design
general purpose
image processing
hardware architecture
type ii