A Simulator For Reconfigurable Massively Parallel Architectures.
Pierpaolo BagliettoMassimo MarescaMauro MigliardiPublished in: PDP (1994)
Keyphrases
- massively parallel
- parallel architectures
- parallel computers
- heterogeneous computing
- field programmable gate array
- parallel computing
- high performance computing
- fine grained
- reconfigurable architecture
- interconnection networks
- functional units
- low cost
- parallel machines
- processing elements
- general purpose
- mesh connected
- hardware implementation
- scheduling problem
- parallel programming
- graphical models