Dynamic Context Compression for Low-Power Coarse-Grained Reconfigurable Architecture.
Yoonjin KimRabi N. MahapatraPublished in: IEEE Trans. Very Large Scale Integr. Syst. (2010)
Keyphrases
- image sensor
- low power
- coarse grained
- fine grained
- reconfigurable architecture
- power consumption
- low cost
- high speed
- single chip
- digital signal processing
- vlsi architecture
- logic circuits
- vlsi circuits
- low power consumption
- power reduction
- mixed signal
- systolic array
- high level
- cmos technology
- shared memory
- image processing
- protein sequences
- image compression
- gate array