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Delay optimization considering power saving in dynamic CMOS circuits.

Kumar YelamarthiChien-In Henry Chen
Published in: ISQED (2011)
Keyphrases
  • power saving
  • power consumption
  • power dissipation
  • power reduction
  • high speed
  • low power
  • cmos technology
  • delay insensitive
  • energy saving
  • circuit design
  • analog vlsi
  • low cost
  • energy efficiency
  • multi threaded