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Efficient CMOS driver-receiver pair with low-swing signaling for on-chip interconnects.
José C. García
Juan A. Montiel-Nelson
Saeid Nooshabadi
Published in:
ECCTD (2007)
Keyphrases
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low cost
high speed
cmos technology
analog vlsi
input output
circuit design
neural network
power consumption
cmos image sensor
pairwise
low power
image sensor
random access memory
chip design