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Design of a novel low-latency parameterizable posit adder/subtractor using leading one predictor in FPGA.
Bahadir Özkilbaç
Tevhit Karacali
Published in:
Digit. Signal Process. (2024)
Keyphrases
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low latency
real time
high throughput
database
data sets
efficient implementation
data analysis
low cost
highly efficient
high bandwidth