Digital VLSI using parallel architecture for co-occurrence matrix determination.
Myriam BaDominique DegrugillierClaude BerrouPublished in: ICASSP (1989)
Keyphrases
- co occurrence
- parallel architecture
- similarity matrix
- parallel processing
- hardware implementation
- systolic array
- shared memory
- wordnet
- high level synthesis
- signal processing
- semantic similarity
- parallel implementation
- distributed memory
- semantic relations
- singular value decomposition
- named entities
- latent semantic analysis
- probabilistic latent semantic analysis
- word co occurrence
- topic models
- machine learning
- visual features