Low-power DV encoder architecture for digital CMOS camcorder.
Jeff Y. F. HsiehTeresa H. MengPublished in: ICASSP (1999)
Keyphrases
- low power
- mixed signal
- power consumption
- cmos image sensor
- vlsi circuits
- low cost
- high speed
- power reduction
- vlsi architecture
- single chip
- cmos technology
- multi channel
- nm technology
- analog to digital converter
- digital signal processing
- low power consumption
- image sensor
- real time
- rate distortion
- power dissipation
- low voltage
- parallel processing
- power saving
- circuit design
- delay insensitive
- bit rate
- motion estimation