Minimum Cost Fault Tolerant Adder Circuits in Reversible Logic Synthesis.
Sajib Kumar MitraAhsan Raja ChowdhuryPublished in: VLSI Design (2012)
Keyphrases
- fault tolerant
- minimum cost
- logic synthesis
- logic circuits
- fault tolerance
- np hard
- distributed systems
- interconnection networks
- network flow
- approximation algorithms
- low power
- spanning tree
- heuristic search
- network flow problem
- multi valued
- load balancing
- inductive learning
- quantum computing
- capacity constraints
- undirected graph
- optimal solution
- special case
- lower bound