A feature design framework for hardware efficient neural spike sorting.
Jure SokolicMajid ZamaniAndreas DemosthenousMiguel R. D. RodriguesPublished in: EMBC (2015)
Keyphrases
- conceptual framework
- real time
- efficient implementation
- embedded systems
- hardware design
- design principles
- hardware architecture
- main contribution
- software architecture
- design patterns
- neural network
- control unit
- evolvable hardware
- design methodology
- hardware implementation
- hardware and software
- probabilistic model
- user interface
- associative memory
- lightweight
- software engineering
- parallel architectures
- spike trains
- feature vectors
- image processing