An optimized buffer insertion algorithm with delay-power constraints for VLSI layouts.
Chessda UttraphanNasir Shaikh-HusinMohamed Khalil HaniPublished in: Turkish J. Electr. Eng. Comput. Sci. (2017)
Keyphrases
- improved algorithm
- worst case
- optimal solution
- detection algorithm
- experimental evaluation
- computational complexity
- theoretical analysis
- linear programming
- computational cost
- multiple constraints
- times faster
- matching algorithm
- particle swarm optimization
- dynamic programming
- search space
- preprocessing
- np hard
- signal processing
- significant improvement
- k means
- learning algorithm
- similarity measure
- recognition algorithm
- neural network
- parallel implementation
- space complexity
- objective function
- expectation maximization
- high accuracy
- probabilistic model