A 6- μ W Chip-Area-Efficient Output-Capacitorless LDO in 90-nm CMOS Technology.

Jianping Guo Ka Nang Leung

Published in: IEEE J. Solid State Circuits (2010)

Keyphrases

cmos technology
low power
spl times
low voltage
power consumption
parallel processing
high speed
mixed signal
low cost
image sensor
silicon on insulator
image processing
video camera
cmos image sensor