A Segmented Analog Calibration Scheme for Low-Power Multi-Bit Pipeline ADCs.
Olujide A. AdeniranAndreas DemosthenousPublished in: ICECS (2006)
Keyphrases
- low power
- mixed signal
- vlsi architecture
- power consumption
- low cost
- high speed
- analog to digital converter
- vlsi circuits
- single chip
- image sensor
- high power
- vlsi implementation
- successive approximation
- logic circuits
- cmos technology
- wireless transmission
- multi channel
- digital signal processing
- gate array
- cmos image sensor
- signal processing
- real time
- power dissipation
- power reduction