Efficient and programmable ethernet switching with a NoC-enhanced FPGA.

Andrew Bitar Jeffrey Cassidy Natalie D. Enright Jerger Vaughn Betz

Published in: ANCS (2014)

Keyphrases

low cost
high speed
real time
general purpose
data acquisition
computationally expensive
image processing
computationally efficient
hardware implementation
single chip
signal processing
hardware design
real time image processing