A Parallel Hardware Architecture for fast Gaussian Elimination over GF(2).
Andrey BogdanovM. C. MertensChristof PaarJan PelzlAndy RuppPublished in: FCCM (2006)
Keyphrases
- hardware architecture
- processing elements
- hardware implementation
- hardware architectures
- associative memory
- parallel implementation
- field programmable gate array
- software engineering
- parallel processing
- block matching motion estimation
- machine learning
- parallel programming
- distributed memory
- efficient implementation
- probabilistic model
- artificial neural networks
- pattern recognition
- artificial intelligence