An Efficient Implementation of a TAGE Branch Predictor for Soft Processors on FPGA.
Katsunoshin MatsuiMd. Ashraful IslamKenji KisePublished in: MCSoC (2019)
Keyphrases
- parallel architecture
- real time
- hardware implementation
- hardware architecture
- fpga technology
- software implementation
- instruction set
- neural network
- parallel algorithm
- efficient implementation
- hardware and software
- high speed
- highly parallel
- signal processing
- hardware design
- single chip
- low cost
- genetic algorithm
- fpga implementation