A hardware accelerator for video segmentation using programmable morphology PE array.
Shao-Yi ChienYu-Wen HuangLiang-Gee ChenPublished in: ISCAS (4) (2002)
Keyphrases
- video segmentation
- programmable logic
- field programmable gate array
- low cost
- video sequences
- digital signal processors
- processor array
- hardware implementation
- single chip
- video frames
- parallel implementation
- general purpose processors
- video processing
- shot boundary detection
- embedded systems
- video analysis
- hardware and software
- parallel computing
- image processing
- real time
- computing systems
- segmentation method
- cut detection
- machine learning
- massively parallel
- computer systems
- motion cues
- image processing algorithms
- signal processor
- video editing
- general purpose
- computing platform
- video indexing and retrieval
- saliency estimation
- structuring elements