Systolic Array Synthesis using SFG Representations.

C. R. Wan David J. Evans

Published in: Int. J. Comput. Math. (2002)

Keyphrases

systolic array
reconfigurable architecture
data flow
parallel architecture
machine learning
program synthesis
pattern recognition
higher level
probabilistic model
representation scheme
object oriented
xml documents
video sequences
bayesian networks
high level
case study
knowledge base
artificial intelligence