Design and implementation of low power and high speed multiplier using quaternary carry look-ahead adder.
V. MuralidharanN. Sathish KumarPublished in: Microprocess. Microsystems (2020)
Keyphrases
- low power
- high speed
- logic circuits
- vlsi architecture
- single chip
- cmos technology
- power dissipation
- low cost
- low power consumption
- power consumption
- ultra low power
- digital signal processing
- gate array
- wireless transmission
- high power
- mixed signal
- signal processor
- power reduction
- vlsi implementation
- image sensor
- efficient implementation
- analog to digital converter
- design process