A Low-Power Single-Weight-Combiner 802.11abg SoC in 0.13 µm CMOS for Embedded Applications Utilizing An Area and Power Efficient Cartesian Phase Shifter and Mixer Circuit.
Ali AfsahiJacob J. RaelArya BehzadHung-Ming ChienMichael PanStephen AuAdedayo OjoC. Paul LeeSeema Butala AnandKevin ChienStephen WuRozi RoufoogaranAlireza ZolfaghariJohn C. LeeteLong H. TranKeith A. CarterMohammad NarimanDavid W. K. YeungWalter MortonMark GonikbergMukul SethMarcellus ForbesJay PattinLuis GutierrezSumant RanganathanNing LiEric BleckerJack LinTom KwanRose ZhuMark ChambersMaryam RofougaranAhmadreza RofougaranJason TrachewskyPieter van RooyenPublished in: IEEE J. Solid State Circuits (2008)
Keyphrases
- low power
- power consumption
- high speed
- power dissipation
- high power
- cmos technology
- power reduction
- logic circuits
- low cost
- vlsi circuits
- power management
- delay insensitive
- gate array
- digital signal processing
- single chip
- power saving
- nm technology
- mixed signal
- wireless transmission
- low power consumption
- ultra low power
- low voltage
- vlsi architecture
- energy saving
- image sensor
- energy dissipation
- chip design