Login / Signup
A full digital low power dpsk demodulator and clock recovery circuit for high data rate neural implants.
Aymen Ghenim
Mohamed Ghorbel
Ahmed Ben Hamida
Published in:
ICECS (2010)
Keyphrases
</>
high speed
low power
high data rate
mixed signal
logic circuits
power consumption
cmos technology
single chip
power reduction
real time
gate array
power dissipation
vlsi architecture
ultra low power
circuit design
end to end
low cost
image sequences