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A 2D Beam-Steerable 252-285-GHz 25.8-Gbit/s CMOS Receiver Module.

Takeshi YoshidaShinsuke HaraTatsuo HaginoMohamed H. MubarakAkifumi KasamatsuKyoya TakanoYoshiki SugimotoKunio SakakibaraShuhei AmakawaMinoru Fujishima
Published in: A-SSCC (2023)
Keyphrases
  • high speed
  • power consumption
  • low power
  • low cost
  • circuit design
  • analog vlsi
  • ultra low power
  • neural network
  • linear combination
  • power supply
  • vlsi circuits
  • cmos technology
  • cmos image sensor