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Synthesis of timed asynchronous circuits.

Chris J. MyersTeresa H.-Y. Meng
Published in: IEEE Trans. Very Large Scale Integr. Syst. (1993)
Keyphrases
  • asynchronous circuits
  • model checking
  • delay insensitive
  • timed automata
  • process algebra
  • petri net
  • program synthesis
  • neural network
  • real time
  • texture synthesis
  • information retrieval
  • finite state machines