A 22-Gb/s Time-Interleaved Low-Power Optical Receiver With a Two-Bit Integrating Front End.
Bahaa RadiMohammadreza Sanadgol NezamiMohammad Taherzadeh-SaniFrederic NabkiMichaël MénardOdile Liboiron-LadouceurPublished in: IEEE J. Solid State Circuits (2021)
Keyphrases
- low power
- high speed
- power consumption
- low cost
- image sensor
- single chip
- high power
- vlsi circuits
- digital signal processing
- focal plane
- logic circuits
- power reduction
- mixed signal
- wireless transmission
- low power consumption
- vlsi architecture
- solid state
- real time
- power dissipation
- nm technology
- analog to digital converter