A dual 10-b 200-MSPS pipelined D/A converter with DLL-based clock synthesizer.
Gabriele ManganaroSung-Ung KwakAlex R. BugejaPublished in: IEEE J. Solid State Circuits (2004)
Keyphrases
- high speed
- power consumption
- data conversion
- control method
- data flow
- transfer function
- data sets
- high voltage
- relational databases
- pulse width modulation
- single phase
- text to speech
- propositional satisfiability
- induction motor
- primal dual
- control algorithm
- control strategy
- np complete
- linear programming
- genetic algorithm
- neural network