A virtual 3-D multipole accelerated extractor for VLSI parasitic interconnect capacitance.

Zhaozhi Yang Zeyi Wang Shuzhou Fang

Published in: ASP-DAC (2001)

Keyphrases

high speed
power dissipation
low power
power consumption
virtual reality
virtual environment
virtual world
augmented reality
vlsi circuits
machine learning
chip design
learning environment
gate array
real world
virtual laboratory
finite state machines
artificial intelligence
data mining