Formal Verification of a Multiprocessor Hypervisor on Arm Relaxed Memory Hardware.
Runzhou TaoJianan YaoXupeng LiShih-Wei LiJason NiehRonghui GuPublished in: SOSP (2021)
Keyphrases
- formal verification
- model checking
- computing power
- multithreading
- bounded model checking
- memory management
- model checker
- internal memory
- operating system
- low cost
- automated verification
- parallel hardware
- computational power
- symbolic model checking
- hardware and software
- highly parallel
- real time
- temporal logic
- level parallelism
- virtual machine
- memory requirements
- multiprocessor systems
- memory access
- memory hierarchy
- formal specification
- embedded systems
- main memory
- optimal solution
- program slicing
- processing elements
- single chip
- network resources
- computing systems
- hardware implementation
- computer systems
- response time