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H.264 Decoder at HD Resolution on a Coarse Grain Dynamically Reconfigurable Architecture.

Mahendra Kumar Angamuthu GanesanSundeep SinghFrank MayJürgen Becker
Published in: FPL (2007)
Keyphrases
  • coarse grain
  • reconfigurable architecture
  • fine grain
  • systolic array
  • low complexity
  • parallel computation
  • high resolution
  • high definition
  • image quality
  • fine grained
  • data flow
  • multithreading