Reconfigurable circuit for implementation of family of 4-phase latch protocols.
Jotham Vaddaboina ManoranjanKenneth S. StevensPublished in: FPL (2016)
Keyphrases
- power reduction
- hardware implementation
- circuit design
- power consumption
- special case
- hardware software co design
- data sets
- efficient implementation
- low cost
- database systems
- low power
- hardware and software
- training phase
- communication protocols
- cmos technology
- evolvable hardware
- single phase
- evolutionary algorithm
- reconfigurable hardware