Design of Low-Power Structural FIR Filter Using Data-Driven Clock Gating and Multibit Flip-Flops.
Lamjed TouilAbdelaziz HamdiIsmail GassoumiAbdellatif MtibaaPublished in: J. Electr. Comput. Eng. (2020)
Keyphrases
- power dissipation
- low power
- power consumption
- power reduction
- flip flops
- low cost
- cmos technology
- low power consumption
- logic circuits
- fir filters
- digital signal processing
- high speed
- design methodology
- real time
- filter design
- image sensor
- energy saving
- energy efficiency
- mixed signal
- design considerations
- object oriented
- image processing