Self-calibration technique for reduction of hold failures in low-power nano-scaled SRAM.

Swaroop Ghosh Saibal Mukhopadhyay Keejong Kim Kaushik Roy

Published in: DAC (2006)

Keyphrases

low power
power consumption
power reduction
high speed
low cost
high power
single chip
cmos technology
vlsi architecture
low power consumption
digital signal processing
image processing
wireless transmission
power saving
camera motion
camera calibration
computer vision
gate array